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EnglishWhat research areas and projects does Berkeley Architecture Research cover?
Updated
Berkeley Architecture Research (BAR) at UC Berkeley covers computer architecture research with a strong emphasis on building working prototypes. Its work spans historical projects such as Project Genie, RISC-I, RISC-II, SOAR, SPUR, RAID, NOW, IRAM, and RAMP, and current microprocessor designs based on the RISC-V instruction set and the Chisel hardware description language. The group reports multiple microprocessor tapeouts in advanced processes every year.
Research focus and approach
The group describes computer architecture research at Berkeley as having a long history in the EECS department, dating back to the CALDIC computer completed in 1951. One noted CALDIC alumnus was Douglas Engelbart, who later invented the computer mouse.
A defining characteristic stated on the site is an emphasis on construction of prototypes. This is presented as a continuous tradition, carried forward today through annual tapeouts of microprocessors in advanced process technologies.
Current design stack
Recent microprocessor designs share two Berkeley-developed foundations:
| Element | Role in current designs |
|---|---|
| RISC-V instruction set | Basis for all recent microprocessor designs |
| Chisel hardware description language | Implementation language for those designs |
Representative projects
The site lists the following as notable computer architecture projects in Berkeley's history:
- Project Genie
- RISC-I and RISC-II
- SOAR
- SPUR
- RAID
- VLSI-BAM
- T0
- NOW
- IRAM
- RAMP
These names are presented as a historical lineage rather than as individually described efforts on the homepage. Readers who want details on a specific project should follow the links provided at the top right of the site, which the page points to for information on current work.
Seminars and staying current
BAR hosts weekly seminars on topics related to computer architecture research. The homepage directs readers to a separate link for more information on the seminar series. For someone deciding whether to follow the group's work, the seminar page is the most direct route to current activity, while the project links cover ongoing research areas.
Funding and sponsors
The group acknowledges past and present sponsors, including DARPA, NSF, DoE, ONR, C-FAR, Intel, Google, HP, Huawei, IBM, LGE, Microsoft, National Instruments, NEC, Nokia, NVIDIA, Oracle, Samsung, ST Microelectronics, TSMC, and Xilinx. This list indicates both government funding and industry collaboration across the group's history.
What this means for a reader
If you are looking for a single lab with a continuous record from early RISC designs to open instruction set architecture and agile hardware development, BAR fits that profile: the same department that produced RISC-I and RISC-II now tape out RISC-V processors written in Chisel. If you need specifics on any one project, the homepage itself only names them; the linked project pages are where the substantive descriptions live.